The present invention relates to a switched capacitor integrator for use in electronic filters, voice recognition circuits and voice composing circuits.
FIGS. 1A and 1B show a basic circuit of a switched capacitor circuit and FIG. 2 shows its equivalent circuit. In these figures, a switch S is connected at the first stationary contact a to the input terminal 11, and at the secondary stationary contact b to the output terminal 12. A common contact c is connected through a capacitor Cs to ground. Potentials Vi and Vo with respect to ground potential are applied to the input and output terminals, respectively. As shown in FIG. 1A, when the switch S is turned to the contact a, the charge Q1 stored in the capacitor Cs is given by Q1=Cs.times.Vi. When it is turned to the contact b, as shown in FIG. 1B, the charge Q2 stored in the capacitor Cs is expressed by Q2=Cs.times.Vo. The switching operation of the switch S from the input terminal 11 to the output terminal 12 is equivalent to the movement of .DELTA.Q from the input terminal 11 to the output terminal 12. .DELTA.Q is EQU .DELTA.Q=Q1-Q2=Cs(Vi-Vo) (1)
When the switch S is switched f.sub.s times per second, an average current i flowing from the input terminal 11 to the output terminal 12 is given EQU i=.DELTA.Q.multidot.f.sub.s =Cs(Vi-Vo)f.sub.s ( 2)
If the switching frequency f.sub.s of the switch S is sufficiently larger than the frequencies of the voltages Vi and Vo, the current i is equal to the current determined by the instantaneous values of the voltages Vi and Vo. Accordingly, the circuit shown in FIGS. 1A and 1B is equivalent to a circuit with a resistor connected between the input and output terminals 11 and 12. Here, the resistor R is given ##EQU1##
As described above, in the switched capacitor circuit, the capacitor Cs connected at one end to the reference potential is switched at the other end between two different potential terminals. Equivalently, the resistor R is connected between the two potential terminals. The switched capacitor is the integrator formed by using the switched capacitor circuit.
FIG. 3 shows a mirror integrator formed using the operational amplifier 31 and its input vs. output characteristic is mathematically expressed by the following equation ##EQU2## where Vi is an input voltage, Vo an output voltage and Rs a resistance of an input resistor between the input terminal 11 and the inverting input terminal (-) of the amplifier 31, Cf a capacitance of a feedback capacitor connected between the output terminal and the inverting input terminal (-) of the amplifier 31, and S is the Laplacian transform.
In FIG. 3, V.sub.DD and V.sub.SS are power sources, and the non-inverting input terminal (+) of the amplifier 31 is connected to ground.
FIG. 4 shows a mirror integrator formed using the switched capacitor circuit 41 in place of the resistor Rs in the circuit shown in FIG. 3. The input vs. output characteristic of the circuit 41 is such that the R in the equation (3) is substituted into the Rs in the equation (4), and is given ##EQU3## As seen from the equation (5), the input vs. output characteristic of the mirror integrator is a linear function of a capacitance ratio of the capacitances Cs and Cf, and the switching frequency f.sub.s of the switch S. This indicates that the integration time constant may be changed proportional to the frequency f.sub.s, and that the filter formed using the mirror integrator shown in FIG. 4 can switch the filtering frequency proportional to the switching frequency f.sub.s.
FIGS. 5A and 5B show mirror integrators equivalent to the mirror integrator shown in FIG. 4. In the mirror integrators shown in these figures, switched capacitor circuit 50 is each provided with two switches S1 and S2. Both ends of the capacitor Cs can simultaneously be switched by the switches S1 and S2. The first stationary contact a1 of the switch S1 is connected to the input terminal 11; the secondary stationary contact b1 to ground; and the common contact to one end of the capacitor Cs. The first stationary contact a2 of the switch S2 is connected to the inverting input terminal (-) of the amplifier 31; the second stationary contact b2 to ground; and the common contact to the other terminal of the capacitor Cs. Incidentally, in the mirror integrators, the switched capacitor circuit is used as an equivalent resistor with a positive resistance.
When the switches S1 and S2 are turned to the stationary contacts b1 and b2, respectively, as shown in FIG. 5A, the charge of the capacitor Cs is discharged to zero. As shown in FIG. 5B, when the switches S1 and S2 are connected to the stationary contacts a1 and a2, respectively, as shown in FIG. 5B, the charge Q given by the following equation is stored in the capacitor Cs. EQU Q=Cs(Vi-Vi') (6)
where Vi is a voltage applied to the terminal 11 and Vi' is a voltage applied to the inverting input terminal (-) of the amplifier 31.
The average current i of the capacitor Cs is given by EQU i=Cs(Vi-Vi')f.sub.s ( 7)
where f.sub.s is the switching frequency of the switches S1 and S2. Further, the equivalent resistance R between the stationary contacts a1 and a2 is ##EQU4## The equation (8) is the same as the equation (3). The switched capacitor circuit 50 shown in FIGS. 5A and 5B is equivalent to the switched capacitor circuit 41 shown in FIG. 4.
As shown in FIGS. 4, 5A and 5B, the switched capacitor integrator used as the mirror integrator requires a single source terminal connected to a reference power source Vref (ground) in addition to the two power source terminals connected to the two power sources V.sub.DD and V.sub.SS for the amplifier. For this reason, when the switched capacitor integrator, together with the ordinary random logic using two power sources (V.sub.DD, V.sub.SS), is fabricated into a single device, there is required a further terminal for the reference power source in addition to the two power source terminals. The increase of the number of the power source terminals provides a great problem in integrated circuit fabrication for the following reasons. The circuit becomes complicated and a longer time must be taken for the circuit design. The chip area is increased and its patterning is complicated because three power source terminals must be used. Further, design of the printed circuit board for containing the integrated circuits becomes complicated, resulting in increase of the cost to manufacture.